Control method for internal combustion engines

ABSTRACT

A control system and method for the ignition and fuel system of an internal combustion engine of a vehicle in which certain operating conditions of the engine and vehicle are sensed and converted into coded information which can be processed by the computer controlling the system.

United States Patent Monpetit Sept. 9, 1975 [54] CONTROL NIETHOD FORINTERNAL 3,713,427 1/1973 Adler 123/32 EA COMBUSTION ENGINES 3,714,5901/1973 Freeman et a1. 340/347 AD 3,742,920 7/1973 Black 123/32 EAInventor: Louis Monpetit, g 3,757,755 9 1973 Carner 123 32 EA France[73] A Soc t d Pr ed M d FOREIGN PATENTS OR APPLICATIONS ssignee: 1e ees 0c es 0 ernes d,lnjection p y, France 1,939,611 2/1970 Germany 132/32EA [211 APPL NOJ 422,062 7 Williams: Electronic Fuel Injection,Electronics, September 11, 1972, Vol.45, No. 19, pp. l2ll25.

[30] Foreign Application Priority Data Primary Examiner Felix D- GmberDec. 6, 1972 France 72.43329 Attorney Agent or Firm Darby & Darby June4, 1973 France 73.20169 June 6, 1973 France 73.20514 [57] ABSTRACT [52]F' 235/ izah g i ig i A control system and method for the ignition andfuel [51] 235 6 2 150 21 system of an internal combustion engine of avehicle [58] me d 0 g f 1 in which certain operating conditions of theengine l l and vehicle are sensed and converted into coded informationwhich can be processed by the computer [56] References Clted controllingthe system.

UNITED STATES PATENTS 3,591,785 7/1971 Miller 340 347 AD 28 Clams 21Drawmg Flgum SPEED PRESS.

FORM WORD SEGMENT (FIG.2,3 0R4) SENSOR (FIGv5,6)

TIME DURATION FIG. IO

PATE'N'MSEP 915% 33,904,856

sum 2 5- COUNT 2'2 couNk 2-3 I BUF AND 434 A i- AND 3.8

' COUNT BUFE 3.7 AND REG. COUNT\--\ E j 1" 1 BUFFER REG.

COUNTER SHEET Q AND AND F COUNTERg PATENT EDSEP' 9197s COUNT BUFFER REG.

I??? 6 COUNT AND 6.4

AND

c0uNT- COMF? PATENTED 53% 3,904,856

X1 X 3 4 5 x X8 NAND PATENTEU 5 3,904,856

sum 6 H NAND 9.7 S b 51% COUNT DIV 2 NAND '6- couN T\ COUNTER 01v 2 9.10H

PATENTED 91975 3,904,856

SHEET 7 11.6 Jig/1(a) 11.7 (6K 11. 2

PATENTED W975 3,904,856

SHEET 8 (FROM 11.28 FIG) F; iiOM 116 FIG I!) 12.7

12.5 12.5 NAND COUNTER MONOSTABLE "7' 12.23 ,LWL 1250 MONOSTABLE NAND.-Myw 12.18 12.40

/2.38 121013151219 12-15 NAND (FROM 8.7 FIG.8)

PATENTEBSEP SIQYE- 3, 904,856

SHEET 9 Flag: [3 SPEED PRESS. SENSOR\ TIMING ,sENsOR ((FIGJ) 13.1\ I3.2

{x I34 I35 Vx FORM WORD SEGMENT FORM WORD\- 5 (FIG.5,6)

SEGMENT I (FIG.2,3 OR 4) 52 S3 l PROGRAMMED /MEMORY TRANSFORMATION(FIG.7) 13.7 S

[3.8 5 [TIME DURATION (FIGJO) PATENTEU SEP 91975 SHEET '10 7-4.2 ANDGATE PRESE'LECTIONV COUNTER 14,3

COUNTER/ ill! wm'mw 1915 904,856

SHEET 1 1 l F7 A n J Tr N m CONTROL METHOD FOR INTERNAL, COMBUSTIONENGINES This invention concerns a control method for internal combustionengines, particularly for car engines.

It is known that improvements can be made in the riding comfort, safety,performance, and pollution control of motor vehicles by the use ofelectronic circuits. These circuits are used to check and/or to control,the operation of certain elements, or to inform the driver of thevehicle about the respective conditions of such elements. These circuitsuse techniques which are generally known in the field of information orindustrial process computers.

In vehicles equipped with an electronic control sys tem, the computerreceives information in various forms from sensors which constantlymonitor the operating conditions of the vehicle or of a certain part ofthe vehicle. Starting from this information produced by the sensors, onecan work out a complex function depending on the variables sensed by thesensors to control elements of the vehicle or simply to make the valueof the said function visible or audible to the driver. In either case,it is frequently advantageous to use numerical (i.e. digital)techniques, which can now be readily processed due to the existence ofintegrated circuits.

The object of the'invention is to provide a simple system for producinginformation supplied by the sensors in numerical, that is in codeddigital form and ways to transform and utilize this coded information.

The present invention concerns a control method and system for internalcombustion engines and is characterised in that the coded informationsupplied by the sensors measuring physical operating quantities of theengine are produced at a certain frequency, the socalled samplingfrequency. The coded information is produced in the form of a number ofword segments comprising a limited number of digits and the means valveof several samplings of the word segments is representative of the meanvalue of the corresponding physical quantity, since the word segmentsare grouped to form a complete first word. The first word is convertedby a programmed memory into a second word and the second word isconverted by a transformation circuit into a function whose mean valueis representative of the mean value of a desired regulating function.This regulating function is converted into a control quantity for theengine.

Other characteristics of the invention will become apparent from thefollowing description with reference to the attached drawings where:

FIG. 1 shows a schematic diagram of a circuit for forming the samplingfrequency and the signals at various points of the circuit;

FIG. 2 shows a schematic diagram of a coding circuit for a frequencymeasurement with interpolation and displacement'of zero in the casewhere the sampling frequency is lower than the measured frequency;

FIG. 3 shows a schematic diagram of a coding circuit for a frequencymeasurement to eliminate the stroboscopic effect in the case where thesampling frequency is of the same order of magnitude as the measuredfrequency;

FIG. 4 shows a schematic diagram of a frequency measuring circuit forretention of the first numbers of the measured quantity;

FIG. 5 shows a schematic diagram of a circuit for forming a sawtoothsignal and its utilization with a comparator;

FIG. 6 shows a schematic diagram of a circuit for producing a numericalcode in response to a voltage;

FIG. 7 shows a schematic diagram of a circuit for forming a linearfunction;

FIG. 8 shows a schematic diagram of a circuit for the formation of alinear function from coded information;

FIG. 9 shows a schematic diagram for forming the mean value of a linearfunction in a numerical form;

FIG. 10 shows a schematic diagram of a circuit for transforming avoltage into a time duration;

FIG. 11 shows a diagram of the arrangement of a speed sensor (11a), ofthe structure of the sensor (1 1b), and (11c) of a circuit,incorporating this sensor, for forming a doublefrequency signal;

FIG. 12 shows a schematic diagram of a circuit for forming two signalsin the particular case of ignition control of the engine;

FIG. 13 shows a block diagram of a complete circuit for system andmethod according to the invention;

FIG. 14 shows a schematic diagram of a circuit for numerical countingused for measuring a physical quantity by sampling;

FIG. 15 is a timing diagram of a circuit for converting a linear into anon-linear function;

FIG. 16 shows a curve representing the variation of the cyclical ratioin accordance with one embodiment of the invention;

FIG. 17 shows a curve representing the variations of the cyclical ratioaccording to another embodiment of the invention;

FIG. 18 shows a schematic diagram of a simplified electronic circuit forthe formation of the function represented in FIG. 3; and

FIG. 19 shows a diagram of output signals of the circuit of FIG. 18 forthe different values of the cyclical ratio.

Within the framework of the invention, the signal supplied by a sensoris translated into a numerical digital) form. The sensors used inanautomobile or other vehicle are of different type and of differentnature. They translate their measurements in the form of a variation ofa measured electric quantity. This information can exist directly innumerical digital form, for example, the position of an element providedwith a digital enloder. This type of sensor does not present anyparticular problems.

The information can also be represented by pulses of variable frequencycalled, for example, f,. This is the case, for example, in a sensor ofthe type detecting the proximity with regard to a gear provided withteeth. In this case we measure, as shown in an example below, either thefrequency of the pulses or their repetition cycle. We will generallychoose these among two possibilities, depending on the respectiveproblem and particularly on criteria discussed below.

If it is necessary, as it frequently happens, to form the mean value ofan electrical signal to represent the mean value of a physical quantityvarying about a given posi tion, it is advisable, if the operation is tobe representative, that the response of the sensor be linear.

The signal of the sensor can also be in the form of a voltage. In thiscase we can proceed by using known voltage-frequency converters, forexample, to periodically compare the sensor voltage with a variable(sawtooth) voltage and measure the number of pulses supplied by a clock,while the sensor voltage is lower (or higher) than the referencevoltage. This is a technique which is well] known, for example, for usein electronic voltmeters.

Finally, the sensor can deliver its information the form of variationsof a resistance, inductance or electric capacitance. These variationscan be easily transformed into variations of voltage or pulse frequency.

The part of the computer provided for the acquisition of data from thesensors must furnish periodically at a given frequency, called thesampling frequency, coded information in the form of digits such thatthe mean value determined after a sufficient number of samplings isrepresentative of the mean value of the physical input quantity to thesensor.

Referring to FIG. 1, which shows a circuit for controlling the samplingfrequency, the quantity or quantities from the sensors are measuredduring a time T. The time T is obtained, for example, by dividing pulsesproduced by a clock circuit H.

The clock H directs pulses of a frequency l/T to a divider 1 whoseintermediate outputs are represented by A A A,, At the output A,- thefrequency of the pulses is equal to the clock frequency, divided by 2 Bymeans of the AND gates 2, 3 and and of an inverter 4 connected to theclock and the divider the following quantities are formed at the gateOutputs:

S SyAyl-I (A is the inverted state of A The sampling period is, forexample, T 2" T,, which is found in the S S or S, outputs, as indicatedin the diagram adjoining FIG. 1.

Measurement of a frequency.

The measurement of a frequency, produced as previously described, issimple. It suffices to count, for example, how many pulses are producedby the quantity being measured as expressed by a frequency during thetime T.

If we take into account the conditions listed above, the problem becomesmore complex. I

In order to facilitate the understanding assume, for example, that thefrequency of the clock pulses from H is 1 mI-Iz (T, seconds). Assumefurther that we have effected a division by 2 (n 10), that is, T 512microseconds (the division by a power of 2 is not obligatory). Finally,assume that a pulse frequency to be measured varies between 0.4 and 0.8MHZ.

If the method described above is applied, the number of pulses countedwill be between:

We realize then that a counter with at least 9 digits (2 512) isrequired to count the number of pulses received with an accuracy of 1pulse. The counter will always have to start at at least 204.

In order to eliminate this inconvenience, a circuit according to FIG. 2is used. Element 2.1 is a NAND gate as is 2.5. Element 2.4 is an ANDgate while elements 2.2, 2.3 and 2.6 are binary counters. Element 2.7 isa transfer unit, such as a buffer storage registerv which can store thecount operation of the circuit of FIG. 2 as described as follows. Thegate 2.1 forwards the pulses whose frequency f I is to be measuredduring a time T 2""1, which; is less than a time A2 high,

that is, inthe highest example 512 2 X 1 510 microseconds. It followsthat during .a sampling time, N pulses with N between 0.4 X 5. 1X10 204and 0.8 X 5.1 X 10 408 pulses will pass through gate 2.1.

The counter 2.2 is connected as a divider to divide by D so that thenumber of pulses leaving 2.2 and entering counter 2.3 and gate 2.5 isN/D. These pulses are applied to counter 2.3 and the outputs of certainstages of 2.3 are applied to the inputs of AND gate 2.4, so that theoutput of 2.4 is high only when the outputs from 2.3 appearing at theinput of 2.4 are all high, that is, when 2.3 has counted a certainnumber of pulses. The output of AND 2.4 is applied back to a specialinput of 2.3, which blocks the counter when the certain count isreached, and also to gate 2.5. The pulses from counter divider 2.2 thustraverse gate 2.5 to counter 2.6, only when counter 2.3 has attained thevalue fixed by the selection of its outputs which are connected to AND2.4.

At the end of the sampling period T, 2.6 marks a number N N D/N n, if nis the number selected by the output coding of 2.3 applied to AND 2.4Assume, for example, that D and f, is 0.4 MHz so that N/D 2.04.

This indicates that two pulses are produced by counter 2.2 during T andthat at the end of T counter 2.2 has counted 4. If we assume that n 2,this means that at the end of T, if all counters were at zero at thestart, the situation would be as follows:

number of pulses 204 counter 2.2 at the end of T 4 counter 2.3 at theend ofT 2 counter 2.6 0.

Let us assume that the cycle starts again after it has been effected byS (see FIG. 2) applied to the suitable inputs of the counters 2.6 and2.3 from the circuit of FIG. 1 during the time S, but without resettingcounter 2.2 to zero.

At the end of the second sampling we have then:

At the end of three samplings we have 2.6 O and so forth, at the end of25 samplings we have:

This means that the device of FIG. 2 performs two operations:

1. it interpolates the values 2. it eliminates the numbers below acutain value, and

if we want, it displaces the Zero value of the input pulses.

In other words, the circuit of FIG. 2 is suitable to produce an outputcount of 0 for N less than 200, an output count of l for N 300, anoutput count of 4 for N 700.

If a value of N is between 200 and 300, 204 for example, the outputcounter 2.6 marks for (x y) samplings, x times 0 and y times 1, so thatthat is, the interpolation is effected simply by the frequency of twonumbers surrounding the value of N, so that the numerical value is equalto the coded value which would have to be attributed to N.

Buffer 2.7 receives signal S, from the circuit of FIG. 1 and under theorder from S transfers in each cycle the value received at its inputs toits outputs for further use. The circuit of FIG. 2 permits theelimination of useless numbers (saving of digits) and also theinterpolation between values, provided the frequency of f, is highrelative to the sampling frequency. If the latter is not the case, thecircuit of FIG. 3 is used.

The circuit of FIG. 3 can perform operation similar to those of thecircuit of FIG. 2, but on the theory that the frequency f to be measuredis not very high compared to the sampling frequency. The problem is thenthat in order to know the value of the frequency f it suffices inprinciple to count the pulses during a sufficient period of time toobtain the desired accuracy. In the case of a computer for vehicles, itis desirable to know at a relatively high frequency the values close tothe frequency to be measured so as to be able to express it by a numbercounting a few digits. The measurements are made so that the mean valueof the displayed values is equal to the measured value. Taking intoaccount these conditions, we can accept, as in the case of the circuitof FIG. 2, a period for resetting to or holding at zero during whichthere is no counting. In fact, there is a risk of ending up with a wrongresult, due to the stroboscopic effect. If the frequency to be measured,is, for example, equal to 4 times the sampling frequency, the counterwill have an output count of 3 or 4, depending on the relative phase ofthe sampling scale and of the pulses of f,. A solution consists incounting the pulses f constantly.

The operation of the circuit of FIG. 3 is described below. The pulse atthe start of the sampling (5,) is applied to one of the inputs of aflip-flop circuit (RS type) 3.1, which has the effect of bringing theoutput of 3.1 connected to one of the inputs of an AND gate 3.6 to thehigh level. This also has the result that the complementary output of3.1, connected to an input of an AND gate 3.5, is brought at the sametime to the low level. The pulses f, arrive at the other inputs of gates3.5 and 3.6. This has the result that when 3.1 flips into operatingposition at the start of the appearance of S,, the f, pulses can passthrough gate 3.6 in this condition, while they are blocked from passingthrough gate 3.5. The appearance of a pulse f, is thus transmitted to aflip-flop (RS type) 3.3 through gate 3.6 and changes this flip-flopcircuit into the operating state. The output of flip-flop 3.3 connectedto one of the input of an AND gate 3.4 goes high.

To the other input of gate 3.4 is applied S, (S inverted) by an inverter3.2, so that the output of gate 3.4 goes high when:

a. its input connected to 3.3 is high, that is, when the pulse f fromgate 3.6 has been counted and b. its input connected toS, is high, thatis, during the dead time of S,.

The output of gate 3.4 is connected to the zero reset inputs offlip-flops 3.1 and 3.3 to cause the flipping back of 3.3 and 3.1 to theopposite states this causes the opening of the gate 3.5 and closing ofgate 3.6. A counter 3.7, AND gates 3.8 and 3.9, counter 3.10 and buffer3.11; are elements respectively corresponding to 2.3, 2.4, 2.5, 2.6 and2.7 of FIG. 2 with the same functions, (elimination of the pulse countbelow a selected number) of counting and resetting to zero (by S anddata transfer (by 8,). By a suitable arrangement of inputs andpolarities, the circuit elements of FIG. 3 can be so arranged that theflipping of 3.3 is counted or not. If it is not counted, we obtaindirectly the elimination of the first number. The counting by thecircuit of FIG. 3 is permanent, the counting element is generally 3.10.During the dead time of S,, or 8 and until the first f, pulse followingthe start of 8,, the counting element (of 1) consists of 3.3 (and 3.1).This presupposes naturally that the time when S, is high is smaller thanthe minimum period of f which is practically always the case (lowfrequency of f In the opposite case, we can replace 3.3 by AND gate 3.9and count several pulses before opening the principal counter 3.10.

FIG. 4 shows a circuit which is simpler than that of FIG. 3 and whichperforms a similar function. A flipflop circuit 4.1 (RS type) receivesat its working input the signal S, which makes the output connected toan AND gate 4.2 go high and the output connected to an AND gate 4.7 golow. This has the result that the pulses f, can pass gate 4.2 and not4.7. Element 4.3 is a counter similar to 2.3 and blocks the first pulsesbelow a selected number. When, after the start of sampling, a number ofpulses equal to that selected and coded by counter 4.3 and an AND gate4.4 (as explained for elements 2.3, 2.4 in FIG. 2) has traversed gate4.2, the output gate of 4.4 goes high. This has the effect of returningflip-flop 4.1 into its rest condition and consequently of blocking gate4.2 and opening gate 4.7. The counting is continued then by a counter4.5 which has been reset during S, to zero by signal S The count of 4.5is transferred to a buffer 4.6 and it is outputted from 4.6 by the 8;,signal.

Measurement of a voltage The measurement of a voltage from a sensor iseffected by counting pulses during a given time, such as the linearportion of a sawtooth wave. A circuit for accomplishing this isrepresented in FIG. 5.

The signal S, is applied to the base of a transistor 5.6 to discharge acapacitor 5.2 which is connected between the transistor collector andits emitter. Capacitor 5.2 is recharged through a resistor 5.5 and isconnected across the inverted input and the output terminal of anoperational amplifier 5.1. The non-inverting input of the amplifier isbiased by a voltage divider 5.3, 5.4. This well-known circuit produces ahighly linear sawtooth at the output of 5.1.

The sawtooth voltage is compared by a comparator 5.7 with the amplitudeof the voltage to be measured. The output of 5.7 is low, while thesawtooth voltage is higher in amplitude than the voltage to be measured,and the output is high in the opposite case.

If the sawtooth voltage is designated by V,,, then V is translated fromthe end of the S, by the expression V Va kt where V and k depend on 5.3,5.4 and 5.5.

The flipping time of comparator 5.7 is such that .1 V where Te (V110 Themeasuring time is, for example, the sampling time minus S, and Te, hencein the case described above,

2" "T, 2T, T,. A BV where A and B are constants.

The circuit of FIG. 6 is similar to that of FIG. 2 and shows themeasuring arrangement. The output of comparator 5.7 is applied to an ANDgate 6.1. When the output of comparator 5.7 is high (after flipping ofthe comparator) and S, is low, I being applied to AND gate 6.1, the gate6.1 forwards the clock pulses H to a counter 6.2. The pulses are countedby 6.2, which reduces the number (interpolation or division) andtransmits them to another counter 6.3 which is programmed by a gate 6.5,as explained above, for 2.4 for the elimi nation of the pulse countbelow a certain number. This permits, once the certain number is reacheda counter 6.7 to count the pulses transmitted by 6.2 when a gate 6.4 hasbecome conditioned to pass signals by counter 6.3 and gate 6.5. At theend of the cycle (S, high), the counting is stopped since 6.1 is closed.S resets counters 6.3 and 6.7 to zero. S ensures the transfer of datafrom the buffer register 6.8. Counter 6.2 is not reset to zero for thereasons indicated above.

Decoding utilization.

With the means indicated above we can transform the signals supplied byone or more physical quantity sensors into one or several numbers, whichgenerally vary with each sampling, so that the mean value represents thevalue of the measured physical quantity. As a result, each quantity isexpressed at the end of each sampling by a binary number whichcomprises, as required, a given number of digits.

To facilitate the understanding of the invention, assume that we want toform a regulating function depending on four variables L M N 4). Assumethat the quantity L is expressed by 3 binary bits '(8 possible numbers),the quantity M by 4 bits (16 possible num ber), M by 2 bits (4 possiblenumbers) and d) by 1 bit (2 possible numbers). This means that theresult of the sampling can be written in the form of a binary numberwith (3 +4+2+ l)= lObits, or

L1 2 3 1 2 3 4 1 2 1 where the values L, M, N, d) are or 1. The firstword segment consists of L, L L the second word segment of M, M M M,,the third word segment of N, N and the fourth of ab.

O l 1 1 O O 1 l O 1 means that for this word we have the variable L witha numerical value of 3.

have the variable M with a numerical value 9 have the variable N with anumerical value 2 have the variable (i) with a numerical value 1 Thetotal number of possible words is 8 X 16 X 4 X 2 1,024 (2 According to awell-known technique of programmed memories, we can associate with eachof these 1,024 words a number which is representative of the value whichwe want to give the function of L M N d), at the point underconsideration. The word point is here understood in a broad sense,because we are evidently not dealing here with a geometric point, sinceit has five dimensions.

In the course of the sampling the word varies if each quantity does notcorrespond exactly to a ,fixed value of L M N 5, which corresponds tothe interpolation function explained above. It follows that theassociated value varies likewise since its mean value is equal to themean value of the linear form as a function of L M N 1) passing throughfixed points.

To facilitate the understanding, we assume that L is between L, and L,-M between M,- and M,-,,, N between N,, and N and d) between (1), and (15If we designate with 2,, the quantity and designate then the weight ofthe quantity F,- 1 associated with L M,, N and is:

That i+11 1+1 k+1i 1+1 is L' M' N That of i+l, as 2,, (PE 2 4 1-2,) andso forth.

The mean point of the function F, an associated function, is thebarycenter of these points having the indicated loads.

These numbers F are expressed by a binary code comprising the digitsdefined by the accuracy to be obtained, namely, X,, X X Iffis theselected number of digits, X, is the highest load digit,'and X, thelowest load digit.

Decoding The formation of a linear voltage is described. We assume thatf is less than (n-l the number of pulse train outputs of the divider 1of the circuit of FIG. 1. If this is not the case, we can always add oneor more elements to the circuit of FIG. 1, and use only (n-l) to formthe sampling time indicated above.

We form the quantity:

In the course of a sampling, the value of the cyclical ratio high/(highlow) of this function is representative of F and independent of thefrequency.

To facilitate the understanding, We assume that we have In the course ofa sampling period the quantity is:

a, A} is 256 times high and 256 times low a A, K is 128 times high whilea, is low a A, A is 64 times high, while a, and a are low a, A, A A 1?,is 32 times high, while a,, a and a are low a A, A A A, is 16 timeshigh, while a,, a a

and a, are low a, A A A A, A A, is 8 times high while a,, a

a a, and a,, are low a A, A A A, A A A is 4 times high while a,

through a,, are low a,, A, A A A, A A A A 2 times high while a, througha, are low It follows that the ratio of the high signal to the totalsampling time of S is We can thus write R 2F/5 12). This means that thevalue of sampled F is expressed 2 times per sampling time T. If we hadon the other handf= n-l, a single exploration would correspond to eachsampling.

Since we are dealing here with a cyclical ratio, this value isindependent of the clock frequency and of the sampling frequency.

FIG. 7 shows the circuit of a decoder. The circuit, uses by way ofexample, only the NAND gates. The first gate forms the quantity: A17,=3, The second gate forms the quantity: A A X a The 8th gate forms thequantity: A A A X E.

The final gate formszm a +a a S. In order to obtain an analagous voltagerepresentation of F, it suffices therefore to place at the output of S afilter (passive or active) of the RC-type.

Other method of forming-the voltage. FIG. 8.

Another example of a decoding circuit for forming a voltage from thecode recorded in a memory is shown in FIG. 8. To facilitate theunderstanding of the forego ing considerations, we assume that theproblem consists here too in expressing in the form of a voltage themeans value ofa regulating hypersurface depending on 4 parameters L M Nqb, translated at each moment by a code with several digits X,-. By anyor several of the methods described above for sampling information, wedirect at each moment numbers L M N (1) to the inputs of a programmedmemory 8.1. The system can be arranged without a latches circuit, orbuffer, such as 2.7, 3.11, 4.6 or 6.8, between a number representativeof the measuring state of one of the quantities and the memory.

To show this method of forming the circuit, there is represented in FIG.8(b) an arrangement, assuming for example, that the translated quantityL is measured by means of a circuit, such as that of FIG. 6. Thequantity M by a circuit such as that of FIG. 4, the quantity N by acircuit such as that of FIG. 3 and the quantity d by a circuit such asthat of FIG. 2. This choice is simply made by way of illustration. Alsoassume that the counting capacity of these circuits has been necessarilylimited by the choice of the counters.

Blocks 6.7, 4.5, 3.10 and 2.6 represent the circuit elements of FIGS. 6,4, 3 and 2 respectively from which the connections are made to theprogrammed memory 8.1. This means that these elements have beenconnected directly to 8.1, eliminating the buffers 6.8, 4.6, 3.11 and2.7 respectively.

In this arrangement the bits Ll change continually during sampling atthe inputs 8.1.10 to 8.1.19 of the programmed memory 8.1. This producesvariations at the outputs X,- of the memory 8.1, called the code gate.In fact, the outputs X, of 8.1 are connected to the inputs of apreselection counter 8.2. The outputs of this counter are connected to aNAND gate 8.3. The counter 8.2 also receives a transfer signal atanother of its input, called the charge input 8.9, with each pulse atthe end of the sampling, such as signal S described above. When all theinputs of gate 8.3 are high, the output at 8.7 is low, which has theresult that the clock pulses H applied to the input 8.5 of a NAND gate8.4

can arrive at the counting input 8.8 of 8.2. The second input 8.6 of 8.4is low in this case and the output of 8.4 is therefore always high. Onthe other hand, if at least one of the outputs of 8.2 is low, the outputof 8.7 is high and consequently 8.4 forwards the clock pulses H to 8.8and the counter 8.2 can count.

The method of operation of the circuit of FIG. 8 is described asfollows. When the brief transfer pulse 8;, is applied to 8.9, thecounter 8.2 is charged to a number n, such as:

This represents exactly the value of the sampling at the time ofmeasurement.

Assume that the counter 8.2 has 8 digits and that its counting capacityranges therefore from O to 255. It follows therefore that 8.7 is high,except when n 255. Consequently, the pulses H arrive generally over 8.4(unblocked) at 8.8. As soon as S stops, the counter 8.2 counts startingfrom n: (n l), (n 2) When it attains 255, all outputs are high, 8.4 isblocked, 8.7 goes low and the counter remains in the state 255 up to thenext impulse S Assume also that the repetition period of S in n,.H, thatis equal to n times the clock period H, which period is simply obtainedby dividing the clock frequency by n by means of a well-known device.Also assume that S has a duration equal to n H, that is n times theclock period. The output 8.7 is then high during a time I where 2,, nI-I (255n)l-l, or more generally, I n H (255n)H. If N is the capacity of8.2, the ratio I divided by the repetition frequency of the phenomenonis thus:

It follows that the simple filtering of the output 8.7 of 8.3 yields avoltage which is a linear fiinction of n and, consequently, that itsmean value is equal to the mean value of the desired regulation.

Formation of the numerical mean.

Referring to FIG. 9, the following is the procedure to obtain the meanvalue of the function F in numerical form. The clock pulses that existwhile S (FIG. 7) is high are counted for a certain number of samplings,for example, for 2, and we use for the representation of the value of Fonly the number of pulses divided by 2". That is, we use only the (b 1first digits of the counter.

The pulses S of the divider of FIG. 1 are directed to a divider 9.1which divides by 2" (FIG. 9) which brings the output of a NAND codinggate 9.2 inverted by inverter 9.3 to the high level when it has received2" pulses (or another code).

This inverted output from inverter 9.3 is applied to one of the inputsof each of NAND gates 9.4, 9.5, 9.6. To the gate 9.4 is applied at asecond input the signal 5, so that a low pulse of duration S appears atits output for all 2" samplings. This low pulse is applied to one of theinputs of a NAND gate 9.7, which also receives the clock pulses H andthe signal S of FIG. 7.

It follows that H is present at the output of 9.7 if S is high(decoding) and if the output of 9.4 is high. Gate 9.7 is blocked for aduration 8,, for all 2" samplings. The transmitted pulses are counted bythe counter 9.8 which divides their number by 2" and transmits a signalto a counter 9.10 once every 2 pulses.

It follows that the counter 9.8 marks a number N from a zero at thestart of a cycle after 2 samplings The gates 9.5 and 9.6 permit,according to an already described connection, the conditioning of 9.8and 9.10 at each mean cycle by S and 9.5 and the transfer of data fromthe buffer register 9.1 1 by gate 9.6 and signal S Transformation of thevoltage (or code) into a dura tion.

It can happen that we want to transform the signal S of FIG. 7 coded bymodulating the cyclical ratio into a time duration, which is, the timeof the fuel injection, for example. A circuit for accomplishing this isshown in FIG. 10.

To the base of a transistor 10.1 is applied a positive release signal(connected, for example, to the fuel injection release controlmechanism), which makes tran sistor, 10.1 conductive to discharge acapacitor 10.5 through a current limiting resistor 10.4, to the emitterpotential of 10.1. The emitter potential fixed by the voltage divider10.15, 10.14 is stabilized by a capacitor 10.16.

The discharge of capacitor 10.5 reduces the voltage at the non-invertinginput of an amplifier 10.6 and the output signal of 10.6 increases. Thissignal is applied to one of the inputs of a NAND gate 10.9, whichreceives at its other input the release signal inverted by an inverter10.17 so that, though the output of 10.6 is high, the output of NAND10.9 is high up to the end of the release signal, which thus does nothave to be accurate in duration. At the end of this signal the output ofNAND-gate 10.9 becomes low until the output of amplifier 10.6 goes low.

The foregoing is the case when the voltage of 10.5 is higher than thevoltage applied to the non-inverting input of 10.6 from a transistor10.2. The latter voltage is obtained by an RC filter 10.12, 10.11,connected to the collector of 10.2, which receives at its base thesignal S of FIG. 7.

The response of the circuit of FIG. 10 is exponential. That is, for agiven variation of V according to the absolute value of the latter, thevariation of the time is different. This is frequently of interest foran injection circuit, for example, but it is evident that the responsecan be linearized by replacing 10.3 by a constant current generator.

Transformation into angles.

It can happen that we want to transform the signal S into an angle. Thisis obtained easily by a circuit similar to FIG. 10, except that theresistance 10.3 is replaced by a generator which furnishes a certainamount of voltage each time an angular mark is counted. To facilitatethe understanding of this arrangement, we will show in detail how thesesignals are formedin a specific and rather complex case, from whichsimple cases can then be deduced. The selected problem is given below.

It is desired to deliver a signal twice per revolution of a motor, forexample, signals which will be substantially in diametral opposition,but with an angular position. These signals are a multi-dimensionalfunction of several parameters and are to be delivered, for example,over two different paths. This would be the case, for example, in anignition system for four-cylinder engines without distributor, eachsignal releasing the ignition in two cylinders controlled simultaneouslyby the same coil.

The angles can be marked, for example, by counting the teeth of thestarting gear of the motor. To this end, as indicated in FIG. 11(a), asensor is placed opposite said teeth. This sensor can be of any type,optical, with a blocking oscillator, electromagnetic, etc. The gear 11.1 carries a toothed starting ring 1 1.2 opposite which is placed aproximity sensor 1 1.3 which delivers signals at its output 1 1.4. Alsoprovided is a hole or a slot 1 1.5, which can be sensed by a sensor 11.6, called a synchronization sensor, which delivers a signal once perrevolution. The slot 11.5 is put in place before the mechanicalbalancing of the wheel.

In the case under consideration, an operation is to be effected everyhalf revolution of the engine. The number of teeth 11.2 of a startingdevice is, in general, a prime number and hence non-divisible by two. Itis convenient to first obtain a double frequency, that is a signal eachtime an angle equal to half the angle of successive teeth is traversed.To this end an evident solution, not shown here, consists in placing twosensors, such as 11.3, displaced relative to each other by (n+l/2)a.Here, a is the angle which separates two consecutive teeth and n is anyintegral number. The outputs of the two sensors, after adaptation of theimpedance if necessary, are coupled to an OR gate, and at the output ofthis gate appears the signal with the desired frequency.

The same method can be used to obtain a signal with a frequency k timeshigher than that which is naturally produced by the teeth by displacingk sensors, such as the sensor 11.3, relative to each other by angles (n,(i-1)/k)a, with i=- l,2,3 (k1 The first sensor is numbered zero andtaken as the origin of the displacements. This permits obtaining aresolving power which is'k times more accurate than the naturalfrequency produced by the teeth.

In the particular case of the selected example, where k 2, we can obtaina satisfactory solution with a single sensor, such as 11.3, by selectinga sensor of the magnetic type with variable reluctance. This sensor,shown in FIG. 11(1)), comprises a magnetic armature 1 1.8 carrying adouble-ended pole piece spaced in an interval equal to that of twoconsecutive teeth of the wheel. A coil 11.9 is placed around the polepiece and one end is connected, for example, to ground, while the otherend 11.4 is free.

The sensor of FIG. 11(b) is inserted into the electronic circuit shownin FIG. 11(0). The coil 11.9 is supplied current through a resistance11.10 connected to the positive voltage terminal of the installation.The passage of the teeth of 11.2 of the gear produces variations ofvoltage at the coil 1 1.9. The voltage produced varies in correspondencesubstantially as the minimum and the maximum reluctance condistions ofthe sensor 11.3, that is, substantially when the teeth face each otherand when the teethare in maximum angular phase displacement. Thisundulating voltage is transmitted directly through a resistor 11.11 toone of the inputs of a sum-and-difference amplifier 11.15. The mean, oraverage, value of this voltage is applied to the other input through aresistor 11.14, this value being obtained by an RC filter consisting ofa resistor 11.2

and the capacitor 11.13. The amplifier 11.15 passes then from a highstate, for example, to the low state, when the teeth oppose each other,and from the low state to the high state when the teeth are in maximumphase displacement.

The change in state of 11.15 from low to high is derived by an RCcircuit 11.20, 11.26 and is transmitted over a diode 11.24 to the baseof a transistor 11.28 which is normally blocked by the voltage across aresistor 11.27. A resistor 1 1.21 permits the discharge of capacitor 11.20 when the output 1 1.16 of amplifier 1 1.15 is low. It follows thata short duration low signal is produced at the collector of transistor11.28 with each change of voltage from low to high at 11.16.

The signal at 11.16 is inverted by a transistor 11.19 applied to itsbase by resistor 11.17. The signal at 11.16 produced at the collector of11.19, which is supplied voltage by a resistor 11.18, goes positive eachtime 11.16 passes from high to low. This signal is used like the directsignal of 11.16, that is, it is derived by an RC circuit 11.29 andapplied by a diode 11.23 and a resistor 11.25 to the base of atransistor 11.28. The resistor 11.22 serves to discharge capacitor11.29, while 11.16 is high. It follows that a short duration low signalis produced when 11.16 passes from high to low. Finally there isproduced on the collector of transistor 11.28 a signal with double thefrequency of the natural frequency, which is the objective to beachieved.

FIG. 12 shows how the preceding information is used to solve the problemin question. The double frequency pulses formed as in FIG. 11 areapplied to the input 12.1 of the circuit shown while the synchronizationpulses (assumed negative and of an angular width of less than /2) fromsensor 1 1.6 are applied to the input 12.6 of the same circuit. Element12.2 is a counter with p digits with a counting capacity of (2 1), when(2 l) is greater than 211, where v designates the number of teeth 11.2.

Element 12.3 is a gate type circuit which delivers to its output 12.41 anegative (low) signal when the outputs of the counter 12.2 pass througha number representing a number predetermined by the internal connectionsof 12.3. Element 12.4 is similar.

Element 12.3 is coded for a number equal to 211. If A is the signalproduced by 12.3 at 12.41 and B that applied to a gate 12.5 by thesynchronization sensor 1 1.6, a signal C is present at the output of agate 12.5, where:

C=K=K+E It follows that signal C becomes high, whether A or B or bothbecome low. This high signal applied to the proper input of counter 12.2ensures its resetting to zero.

Since the frequency of B after one revolution of the motor, that is, 211pulses to 12.1, is the same as that of A (12.3 wired for 21/) theresetting of 12.2 to zero after at most one revolution of the motor issuch at any time that the number appearing at the output of 12.2 isequal to twice the number of teeth passed by after the passage throughthe position of the slot or hole 11.5 of FIG. 11(a) in front of thesensor 11.6. The output 11.7 of sensor 11.6 is connected to 12.6 asmentioned above.

The signal A is negative and extremely brief, since it causes theresetting of 12.2 to zero and thereby causes its own disappearance overthe element 12.3. This negative signal flips an RS type flip-flopcircuit consisting of the NAND gates 12.8 and 12.9, this flipping bringsthe level of 12.8 high. At the first pulse following the resetting tozero of counter 12.2, the output of its least significant bit (2) passesfrom low to high. This signal (2) is applied to an inverter 12.7 whichis connected to the second input of NAND 12.9 and causes the flipflopcircuit RS to flip back. It follows that at each revolution of themotor, starting from the angular position of resetting to zero, if wetake it as the origin, the output 12.8 moves to high during an angleequal to a/2.

The device 12.4, similar to 12.3, is coded to a value equal to v, whichhas the result that after u impulses, after the resetting to zero, itsoutput moves down and remains there, until 12.2 counts (11 1), that is,during an angular development equal to 04/2. This signal is inverted bythe inverter 12.12.

This inverted signal and the signal issuing from 12.8, formed asdescribed above, are applied over diodes 12.13 and 12.14 to the base ofa transistor 12.15 so that the latter is made conductive from theposition 0 to the position a/2 and from the position to the position(180 04/2). This has the effect of discharging a capacitor 12.28substantially to the potential of the emitter of 12.15, a potentialformed by a divider 12.21, 12.20 stabilized by a capacitor 12.19.

To a 12.18 of the transistor 12.17 are applied over a resistor 12l18from terminal 12.16 rectangular signals whose cyclical ratio isrepresentative of the regulation, for example, those originating fromthe output 8.7 of 8.3 of FIG. 8(a).

This transistor is applied voltage at its collector by a resistor 12.22connected to the positive terminal of the circuit. An RC filter 12.23,12.14 supplies the output of 12.17 through a resistor 12.25 to thenon-inverting input of an operational amplifier 12.35. The outputvoltage of 12.17 has a value between the circuit supply voltage appliedby a resistor 12.22 and the voltage applied to the emitter of 12.17 fromtransistor 12.15 and is representative of the mean cyclical value of thesignals applied at 12.16.

The discharge of capacitor 12.28 causes, as mentioned above, thedownward passage of the inverted input of amplifier 12.35 andconsequently the upward passage of its output. This state remains aslong as 12.15 is conductive, that is, during an angle 01/2. Thecapacitor 12.28 is then recharged intermittently in the followingmanner. With each impulse arriving at 12.1 a monostable circuit 12.36 istriggered (represented here as an integrated circuit, which is known).The negative pulses of fixed duration delivered by it are applied over aresistor 12.37 to the base of a transistor 12.34. During these pulsestransistor 12.34 is thus blocked, permitting the application to the baseof a transistor 12.30 of the high output voltge of amplifier 12.35 overa voltage divider 12.32, 12.33. It follows that, as long as the outputof amplifier 12.35 is high, and only during this time, negative pulsesof a duration equal to that of the pules of the monostable circuit 12.36are applied over a resistor 12.31 to the base of a transistor 12.29,making it conductive by these pulses and charging capacitor 12.28. Itfollows that from the start of the moment when 12.15 is non-conductive,the voltage applied over 12.37 to the inverted input of 12.35 risesintermittently. When this voltage becomes equal to that applied to thenoninverted input, amplifier 12.35 switches back.

This switching thus produces a number nR of impulses arriving at 12.1.,after the end of the conduction.

1. A control system for an internal combustion engine including at leasttwo sensor means for respectively producing information corresponding tophysical quantity representations of operating conditions of the enginecomprising, means for sampling the information supplied by a respectivesensor means at a predetermined frequency, means for coding each of therespectively sampled informations into a word segment having a limitednumber of digits, the mean value of the word segments from severalsamplings being representative of the mean value of the correspondingphysical quantity, means for grouping the word segments to form a firstcomplete word, programmed memory means for converting the first wordinto a second word, means for transforming the second word into afunction whose mean value is representative of the mean value of adesired regulating function for the engine, and means for converting theregulating function into a control quantity for the engine.
 2. A systemas in claim 1 wherein each of said word segments represents a number. 3.A system according to claim 1 wherein the coding means produces wordsegments corresponding to a linear function of the respective conditionssensed by said sensor means.
 4. A system according to claim 1 whereinthe coding means operates in each sampling to produce a word segmentrepresenting the coding of more significant digits and retains the lesssignificant digits for adding to the result of the next sampling.
 5. Asystem according to claim 4 wherein the sensor means produces pulses asthe information which are of a frequency of the same order of magnitudeas the sampling frequency, and means for storing the informationsupplied by the sensor during the duration of a sampling and adding thestored information to the result of the measurement in the followingsampling to eliminate a stroboscopic effect.
 6. A system according toclaim 1 wherein the sensor means produces pulses as the informationwhich are of a frequency which is higher than that of the samplingfrequency, said coding means word segments indicating a numerical valueand said coding means operating to carry a retained numerical value anddisplacing the zero.
 7. A system according to claim 1 wherein the sensormeans measures a voltage, said coding means word segments indicating anumerical value and said coding means operating to carry a retainednumericAl value and displacing the zero.
 8. A system according to claim1 wherein the transforming means for producing the mean value of thefunction operates independently of the sampling frequency.
 9. A systemaccording to claim 8 further comprising preselection counter means forselecting a portion of the word segments produced and wherein thetransforming means includes means for producing the mean value of thefunction by filtering the output signal of the preselection counter. 10.A system according to claim 8 wherein said sampling means includes meansfor producing clock pulses at a predetermined frequency, saidtransforming means producing the mean value of the function in numericalform by dividing the number of clock pulses by the number of samplings.11. A system according to claim 1 further comprising means forconverting the signal corresponding to the regulating function into asignal having a waveform with a determined duration.
 12. A systemaccording to claim 1 further comprising means for converting the signalcorresponding to the regulating function into a signal corresponding toan angle of rotation of the engine.
 13. A system according to claim 1wherein, the second word produced by the programmed memory meansincludes several word segments each corresponding to a regulatingfunction of the operation of the engine.
 14. A system according to claim13 wherein at least one of the word segments of the second wordcorresponds to a control function of an accessory of the engine.
 15. Ina control system for an internal combustion engine including at leasttwo sensor means each for producing information corresponding torespective physical quantity representations of operating conditions ofthe engine comprising, means for sampling the information supplied bythe sensor means at a predetermined frequency, means for coding each ofthe respectively sampled informations into a word segment having anumber of digits, said coding means operating so that the mean value ofthe word segements from several samplings is representative of the meanvalue of the corresponding physical quantity, said coding meansincluding preselection counter means for selecting the portion of theword segment representing the coding of the most significant digits at apreselected value which is related to prime numbers, said coding meansretaining the low order digits and adding them to the result of thefollowing sampling.
 16. In the system according to claim 15 furthercomprising looping means connected to said preselection counter means,said looping means applying a zero-resetting signal to the preselectioncounter means when the latter has counted a number equal to thepreselected value.
 17. In the system according to claim 16 wherein thereare a plurality of preselection counter means each for measuringinformation from a respective means corresponding to a physical quantityeach said preselection counter means operating at a preselected valuerelated to at least one prime number.
 18. In the system as in claim 15wherein each of said word segments represents a number.
 19. A controlsystem for an internal combustion engine including at least two sensormeans each for producing information corresponding to respectivephysical quantity representations of operating conditions of the enginecomprising, means for sampling the information supplied by the sensormeans at a predetermined frequency, means for coding each of therespectively sampled informations into a word segment, means forgrouping the word segments to form a first word, programmed memory meansfor converting said first word into a second word, means fortransforming the second word into a linear function coded by a cyclicalratio, and means for converting said linear function into a non-linearfunction corresponding to a desired regulating function for the engine.20. A system according to claim 19 wherein said means for producing thenon-Linear function produces a function having a constant level, a firststraight-lined portion with a given slope, and a second straight-linedportion with a different slope than said first straight-lined portion.21. A system according to claim 20 wherein the constant level portion ofthe function corresponds to a code of the second word equal to zero, thefirst straight-lined portion to a code ranging from one to apredetermined fixed code, and the second straight-lined portion to aremaining code.
 22. A system according to claim 21 wherein thenon-linear function producing means includes means for modulating theamplitude of the information signal from a sensor means with a variablecyclical ratio as a function of the code of the second word.
 23. Asystem according to claim 20 wherein the means for producing thenon-linear function comprises a first transistor, connected between afeed source and a reference potential point in series with tworesistances whose common point constitutes the output terminal of thecircuit; a second transistor connected in series with a third resistancebetween the said output terminal and the reference potential point; athird transistor connected in series with a fourth resistance betweenthe reference potential point and the common point at the secondtransistor and at the third resistance; a fifth resistance beingconnected in parallel with the said third transistor.
 24. A systemaccording to claim 23 wherein said coding means includes a resettablepreselection counter means for selecting the portion of the wordsegments representing the most significant digits of the word segmentsand wherein the base of the first transistor is connected to the outputof a bistable flip-flop circuit whose first input receives a signal atthe frequency of the variable cyclical ratio before the preselectioncounter is reset which serves to obtain the variable cyclical ratio, andwhose other input receives the complementary signal of the variablecyclical ratio supplied by the preselection counter, this signalexisting only if the code of the second word is different from zero. 25.A system according to claim 23, wherein the base of the secondtransistor receives the complementary output signal of the preselectioncounter.
 26. A system according to claim 23, wherein the base of thethird transistor receives the complementary signal with a predeterminedfixed cyclical ratio corresponding to the predetermined fixed code. 27.A system according to claim 20 wherein the said non-linear functioncomprises more than two straight-lined portions with different slopes.28. A system as in claim 14 wherein each of said word segmentsrepresents a number.